cystech electronics corp. spec. no. : c706j3 issued date : 2009.04.23 revised date : page no. : 1/7 MTB16P04J3 cystek product specification p-channel enhancement mode power mosfet MTB16P04J3 bv dss -40v i d -25a 16m r dson(max) features ? low gate charge ? simple drive requirement ? rohs compliant & halogen-free package equivalent circuit outline absolute maximum ratings (t c =25 c, unless otherwise noted) MTB16P04J3 to-252 parameter symbol limits unit drain-source voltage v ds -40 gate-source voltage v gs 20 v continuous drain current @ t c =25 c i d -25 continuous drain current @ t c =100c i d -18 pulsed drain current *1 i dm -100 avalanche current i as -25 a avalanche energy @ l=0.1mh, i d =-25a, r g =25 e as 31.25 repetitive avalanche energy @ l=0.05mh *2 e ar 15 mj total power dissipation @t c =25 50 total power dissipation @t c =100 pd 17 w operating junction and storage te mperature range tj, tstg -55~+175 c note : *1 . pulse width limited by maximum junction temperature *2. duty cycle 1% g gate d drain g d s s source
cystech electronics corp. spec. no. : c706j3 issued date : 2009.04.23 revised date : page no. : 2/7 MTB16P04J3 cystek product specification thermal data parameter symbol value unit thermal resistance, junction-to-case, max r th,j-c 2.5 c/w thermal resistance, junction-to-ambient, max r th,j-a 75 c/w characteristics (tc=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss -40 - - v v gs =0, i d =-250 a v gs(th) -1.5 -1.8 -3.2 v v ds =v gs , i d =-250 a g fs *1 - 24 - s v ds =-5v, i d =-25a i gss - - 100 na v gs = 20, v ds =0 - - -1 a v ds =-32v, v gs =0 i dss - - -25 a v ds =-30v, v gs =0, tj=125 c i d(on) *1 -25 - - a v ds =-5v, v gs =-4.5v - 14 16 m v gs =-10v, i d =-25a r ds(on) *1 - 22 27 m v gs =-7v, i d =-20a dynamic qg *1, 2 - 32 - qgs *1, 2 - 8.4 - qgd *1, 2 - 9.8 - nc i d =-25a, v ds =-20v, v gs =-10v t d(on) *1, 2 - 15 - tr *1, 2 - 40 - t d(off) *1, 2 - 60 - t f *1, 2 - 50 - ns v ds =-20v, i d =-1a, v gs =-10v, r g =6 ciss - 4285 - coss - 1642 - crss - 1532 - pf v gs =0v, v ds =-20v, f=1mhz rg - 3.5 - v gs =15mv, v ds =0, f=1mhz source-drain diode i s *1 - - -25 i sm *3 - - -100 a v sd *1 - - -1.3 v i f =i s , v gs =0v trr - 40 - ns qrr - 30 - nc i f =-25a, di f /dt=100a/ s note : *1.pulse test : pulse width 300 s, duty cycle 2% *2.independent of operating temperature *3.pulse width limited by maximum junction temperature. ordering information device package shipping marking MTB16P04J3 to-252 (rohs compliant & halogen-free package) 2500 pcs / tape & reel b16p04
cystech electronics corp. spec. no. : c706j3 issued date : 2009.04.23 revised date : page no. : 3/7 MTB16P04J3 cystek product specification characteristic curves
cystech electronics corp. spec. no. : c706j3 issued date : 2009.04.23 revised date : page no. : 4/7 MTB16P04J3 cystek product specification characteristic curves(cont.)
cystech electronics corp. spec. no. : c706j3 issued date : 2009.04.23 revised date : page no. : 5/7 MTB16P04J3 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c706j3 issued date : 2009.04.23 revised date : page no. : 6/7 MTB16P04J3 cystek product specification recommended wave soldering condition soldering time product peak temperature pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds ? time(ts min to ts max ) time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c706j3 issued date : 2009.04.23 revised date : page no. : 7/7 MTB16P04J3 cystek product specification to-252 dimension *: typical inches millimeters inches marking: b a c e h i j k 3 2 1 d f g l date code device name style: pin 1.gate 2.drain 3.source 3-lead to-252 plastic surface mount package cystek package code: j3 millimeters dim min. max. min. max. dim min. max. min. max. a 0.0177 0.0217 0.45 0.55 g 0.0866 0.1102 2.20 2.80 b 0.0650 0.0768 1.65 1.95 h - *0.0906 - *2.30 c 0.0354 0.0591 0.90 1.50 i - 0.0449 - 1.14 d 0.0177 0.0236 0.45 0.60 j - 0.0346 - 0.88 e 0.2441 0.2677 6.20 6.80 k 0.2047 0.2165 5.20 5.50 f 0.2125 0.2283 5.40 5.80 l 0.0551 0.0630 1.40 1.60 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead : kfc; pure tin plated ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0 important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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